This invention relates generally to transponders for use with a radio-frequency identification system ("RF/ID"). More particularly, the present invention relates to a power supply and power sensing circuit for operating an integrated circuit having a ferroelectric memory that is contained within a card-like mobile RF/ID transponder.
Referring now to FIG. 1A, a mobile RF/ID transponder card 10 is shown including an antenna coil 12 having positive and negative output conductors 20 and 22 respectively designated ACPLUS and ACMINUS coupled to a single integrated circuit 14. The RF/ID transponder card 10 is designed to communicate with a reader/controller (not shown in FIG. 1A), sending and receiving data through the antenna coil 12, and storing data in a ferroelectric memory resident of the integrated circuit 14. The RF/ID transponder card 10 need only be placed in the electric field of the reader to initiate communication; actual physical contact with the reader is not required. Antenna coil 12 is fabricated into the transponder card 10, which is about the size of a normal credit card. Typically, antenna coil 12 has several coils wrapped about the periphery of transponder 10. The inductance of antenna 12 is determined by the communication carrier frequency used to communicate between transponder 10 and the reader/controller. Antenna 12, in conjunction with a parallel capacitor, not shown, forms a resonant circuit for locking on to the carrier frequency. For example, a nominal carrier frequency of 125 kHz could be locked on to by an antenna 12 having an inductance of 4.2 millihenries and a capacitor having a capacitance of 390 picofarads.
A single integrated circuit 14 includes a power supply circuit 16 and an RF/ID circuit 18, each having inputs/outputs coupled to conductors 20 and 22 for receiving the signals from antenna 12. The power supply 16 uses the AC signals from antenna 12 to create the power enable, power supply and ground signals on conductors 24, 26, and 28. These signals are respectively designated PWREN, VDD, and GND. The PWREN, VDD, and GND signals are received by RF/ID circuitry 18. RF/ID circuitry 18 is also coupled to antenna 12, and includes transmitter circuits, clock circuits, protocol circuitry, signal processing, ferroelectric memory, and other circuits for communicating with the reader/controller. The VDD and GND signals are regulated power supply signals generated from the AC antenna signals on conductors 20 and 22. VDD and GND are constantly supplied to RF/ID circuit 18, regardless of the voltage value of these signals. A proposed RF/ID tag utilizing FRAM.RTM. technology roughly corresponding to the block diagram of FIG. 1A is shown and described in the "RTx 0801 Ramtag" literature, .COPYRGT. 1990 by Ramtron Corporation, which is hereby incorporated by reference. It is important to note that threshold levels of the PWREN signal are not described in this literature, nor is any circuit embodiment for the power supply or power enable circuit shown.
Many potential applications exist for RF/ID transponders that may be readily carried by a user so that its memory contents can be read when placed near the reader. A still greater number of applications can be found for a true card-sized RF/ID transponder such as transponder 10 to which data may be written as well. A still greater number of applications can be found in which a sufficiently fast memory writing time allows interrogation of the memory contents within a given transaction period.
As a practical matter, the desirable card form factor of the transponder generally precludes the use of a continuous on-board power source such as a battery, which in turn eliminates the possibility of data retention through the use of conventional volatile semiconductor storage devices such as dynamic random access memory ("DRAM") or battery backup static random access memory ("BBSRAM"). Furthermore, the long write times, high-voltage, and high power requirements for conventional non-volatile memories such as electrically erasable programmable read only memory ("EEPROM") and non-volatile random access memory ("NOVRAM") render their use in a transponder energized solely by the signal received by the antenna extremely difficult.
An alternative non-volatile memory technology for retention of data in a passive RF transponder includes the use of a ferroelectric random access memory ("FRAM.RTM. ") integrated circuit utilizing a proprietary lead-zirconate-titanate ("PZT") ceramic thin film available from Ramtron International Corporation of Colorado Springs, Colo. Through the use of FRAM.RTM. technology, it is possible to obtain sufficient power to write to the memory array and power associated logic from a relatively weak external RF field or to obtain a greater range of operation.
One problem with ferroelectric memories is that sufficient voltage must be developed across the memory cell so that all of the domains in the ferroelectric dielectric material are polarized into one of two stable states. Insufficient voltage can result in not all of the domains being polarized, which in turn leads to lower available switching charge and possible loss of data during both reading and writing. Turning now to FIG. 1B several hysteresis loops are shown that illustrate the behavior of the ferroelectric dielectric material. The x-axis represents voltage measured across the memory cell, with positive voltage representing one polarization state, and negative voltage representing the other polarization state. The y-axis represents available charge when switching from one polarization state to the other. Considering loop L1, sufficient voltage V.sub.1, about five volts in the case of PZT, is developed across the ferroelectric material. At five volts, almost all of the domains within the ferroelectric material have switched. At voltages in excess of five volts, increasingly few domains are available to be switched and the ferroelectric material is considered to be fully saturated. The total switched charge associated with loop L.sub.1 is shown to be about Q.sub.1 micro-coulombs and is typically large enough to be easily sensed by a conventional integrated circuit sense amplifier. Considering loop L.sub.2, a voltage V.sub.2 less than five volts, for example three volts, is developed across the ferroelectric material. At three volts only some of the domains within the ferroelectric material have switched. The total switched charge associated with loop L.sub.2 is shown to be about Q2 micro-coulombs, which may or may not be sufficient to be sensed by a conventional sense amplifier. In loop L.sub.3, the driving voltage V.sub.3 is even less, with a correspondingly low switched charge Q.sub.3. The Q.sub.3 charge may be insufficient to be sensed correctly by a conventional sense amplifier.
An example of a ferroelectric memory cell architecture for use in transponder 10 is shown in FIG. 1C. The two transistor, two capacitor ("2T-2C") ferroelectric memory cell in FIG. 1C uses a complementary transistor structure in which ferroelectric capacitor CC1 stores the logic state in one polarization state, and wherein capacitor CC2 stores the logic state in the opposite polarization state. The capacitors are accessed through series-connected transistors M1 and M2. As in a conventional memory cell, the memory cell of FIG. 1C contains complementary bit lines and a word line. Unlike conventional memory cells, the memory cell of FIG. 1C also includes a plate line, which is pulsed during both reading and writing. The operation of a ferroelectric 2T-2C memory cell is further described in U.S. Pat. No. 4,873,664 entitled "Self Restoring Ferroelectric Memory", which is hereby incorporated by reference. The memory cell of FIG. 1C would ideally be integrated into an array of such cells organized into rows and columns.
Accordingly, what is desired is an integrated circuit embodiment and method for allowing operation of the ferroelectric memory on the RF/ID tag only when sufficient internal supply voltage exists for proper memory operation so that data will not be corrupted.